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Silicon Oxide Memories Transcend a Hurdle

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A diagram of the new crossbar memory chip's structure.

Rice University has built crossbar memory chips based on silicon oxide that show potential for next-generation 3-D memories for computers and consumer devices.

Credit: Tour Group/Rice University

Rice University researchers have developed a one-kilobit rewritable silicon oxide device with diodes that eliminate data-corrupting crosstalk. The researchers say the chip demonstrates that it should be possible to go beyond the limitations of flash memory in packing density, energy consumption per bit, and switching speed.

The crossbar memories are flexible, resist heat and radiation, and could be used for stacking in three-dimensional arrays. The diodes eliminate crosstalk by keeping the electronic state on a cell from leaking into adjacent cells.

"It wasn't easy to develop, but it's now very easy to make," says Rice University professor James Tour.

The device sandwiches the active silicon oxide between layers of palladium. The combined layers rest upon a thin layer of aluminum that combines with a base layer of p-doped silicon to act as a diode.

"We've already demonstrated the native sub-5-nanometer filament, which is going to work with the smallest line size industry can make," Tour says.

He also notes that the devices are robust, with an on/off ratio of about 10,000 to one, over the equivalent of 10 years of use. "It will be industry's job to scale this into commercial memories, but this demonstration shows it can be done," Tour says.

From Rice University
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