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Researchers Receive CODES+ISSS Best Paper Award

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 Illustration of the SFC-based architecture called Floret for a 100-chiplet-based system with five SFCs on the interposer network.

The researchers said their Floret topology enables incoming neural layers associated with convolutional neural network inference tasks to be mapped onto contiguous chiplets to avoid long-range communication.

Credit: Harsh Sharma et al.

Researchers at Washington State University's (WSU) School of Electrical Engineering and Computer Science and the University of Wisconsin received a best paper award during ACM/IEEE Embedded Systems Week's International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) for their proposed chiplet-enabled computer architecture.

The paper, "Florets for Chiplets: Data Flow-aware High-Performance and Energy-efficient Network-on-Interposer for CNN Inference Tasks," showed that the architecture could handle machine learning workloads at data center-scale while lowering energy usage and enhancing performance.

Said WSU's Partha Pande, "We have demonstrated that we outperform any existing competitive architectures for the same application space."

From WSU Insider
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Abstracts Copyright © 2023 SmithBucklin, Washington, D.C., USA


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